Hold time

Tags

• Digital
• Electronics
• physics
• Electronics formula
• physics formula
• Sequential logic
• secuencial

Detail

Explore the idea

Variables

• $D,J,K,T,Q$bits
• $t_{su},t_h,t_{pcq}$s
• $n$bits or modulus
• $f_{\max}$Hz.

Conditions

• Named active edge; obey tsu and th.

Intuitive explanation

For “Hold time”: the edge samples D; tsu and th mark the window where a change causes metastability.

Worked example

Common mistakes

• ignoring tsu or th
• treating a transparent latch as a flip-flop
• forgetting the active edge

Frequently asked questions

What must be checked before using the Hold time relation?

Honor the active edge and the tsu and th windows.

Also known as

• D flip-flop, setup time, hold, counter, Moore machine

Related topics

• Flip-flops and timing

Conventions

• s, Hz or dimensionless

Related formulas

• Related

  Setup time

  $$t_{\mathrm{setup}}=t_{\mathrm{clk}}-t_{D,\mathrm{estable}}$$
  Open formulaOpen in section

• Related

  n-bit register

  $$\mathbf Q^+=\mathbf D$$
  Open formulaOpen in section

• Related

  Full adder

  $$S=A\oplus B\oplus C_{\mathrm{in}}$$
  Open formulaOpen in section

• Related

  Average propagation delay

  $$t_p=\frac{t_{pHL}+t_{pLH}}{2}$$
  Open formulaOpen in section