Section 18

Guide to framing a circuit problem

Signal

Resistive DC

Method

Reduce the network and obtain Thévenin/Norton

Signal

Loaded network

Method

Include the load before using the divider

Signal

RC transient

Method

Find $v_C(0^+)$ , $v_C(\infty)$ and $\tau=RC$

Signal

RL transient

Method

Find $i_L(0^+)$ , $i_L(\infty)$ and $\tau=L/R$

Signal

RLC circuit

Method

Write the characteristic equation and classify $\zeta$

Signal

Sinusoids

Method

Convert to RMS phasors and impedances

Signal

AC power or resonance

Method

Compute $P,Q,S$ , PF and the reactive condition

Signal

Filter

Method

Obtain $H(j\omega)$ , cutoffs, slope and loading

Signal

Diode rectifier

Method

Choose a model, identify conduction and ripple

Signal

Operational amplifier

Method

Confirm feedback, linear region and saturation

Signal

Combinational logic

Method

Write the truth table, minimize and check hazards

Signal

Sequential or flip-flop

Method

Check clock, setup, hold and next state

Practical review order#

Practical review order

Draw nodes, references, polarities and directions.
Identify whether the excitation is DC, transient, sinusoidal or digital.
Separate initial state, transient regime and final state.
Choose a valid model for each device and its operating region.
Simplify the network and write KCL, KVL, phasors or a state table.
Solve in SI units and keep signs and RMS or peak values.
Check limits, power, saturation, frequency and timing.
Compare the result with a physical estimate and record assumptions.

Explore the idea

The signal in the statement (DC, transient, sinusoid, device or digital) points to a block, not to memorizing 188 IDs.

Pick «RC transient»: the tree ends at τ, v(0+) and v(∞). For a flip-flop, look at setup and hold.

Choose a signal to see the matching branch.

Choose the signal in the statement: DC, transient, sinusoid, device or digital.