14. Logic families and gates
CMOS versus TTL levels
Formula
Tags
Detail
Computes CMOS versus TTL levels from the circuit model and the stated conditions.
Variables
- V
- s
- Ω
- fan-out and fan-indimensionless.
Conditions
- Logic family on a fixed supply; static levels.
Conventions
- V, s or dimensionless
Last reviewed: 2026-09-19